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usb_host_device
- usb时钟的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
pci
- pci总线的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
USB_send_recive
- 完全用verliog写的FPGA和CH372与电脑USB设备通信。可以和电脑收发数据，已经测试成功，如有疑问留言，程序可能有点乱，-Written entirely in verilog FPGA and CH372 USB devices to communicate with the computer. And computers can send and receive data, it has been tested successfully, if in doubt leave a m
usb_device_core
- usb 设备 IP核 verilog实现-usb device core, verilog
FPGA_Project
- USB 2.0的数据传输verilog程序，采用的是slave状态机实现其功能。其中包括读、写功能 -USB 2.0 data transfer verilog program, using the slave state machine functionality. Including reading and writing functions
vSPI-master
- Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter
utmi
- 介绍USB PHY接口中的UTMI接口， 对使用Verilog进行USB接口编程具有帮助。(This paper introduces UTMI interface in USB PHY interface. It is helpful for programming USB interface with Verilog.)